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  cd4066a typ s cos/mos quad bilateral switch for transmission or multiplexing of analog or digital signals rca c04066a is a quad bilateral switch intended for the transmission or multiplex- ing of analog or digital signals. it is pin-for- pin compatible with rca-c04016, but ex- hibits a much lower on rttsistance. in addi- tion, the on resistance is relatively constant over the full input-signal range. the c04066a consists of four independent bilateral switches. a single control signal is required per switch. both the p and the n device in a given switch are biased on or off simultaneously by the control signal. as shown in fig. 1, the well of the n-channel device on each switch is either tied to the input when the switch is on or to vss when the switch is off. this configuration elimi- nates the varration of the switch-transistor threshold voltage with input signal, and thus keeps the on resistance low over the full operating-signal range. the advantages over single-channel switches include peak inputsignal voltage swings equal to the full supply voltage, and more constant on impedance over the input- signal range. for sample-and-hold applica- tions, however, the c04016is recommended. these types are supplied in 14-lead hermetic dual-in-line ceramic packages (0 and f suffixes), 14-lead dual-in-line plastic pack- age (e suffix), 14-lead ceramic flat package (k suffix). and in chip form (h suffix). special considerations - cd4066a 1. i n applications where separate power sources are used to drive voo and the signal inputs, the voo current capability should exceed voo/rl (rl = effective external load of the 4 c04066a bilateral switches). this provision avoids any permanent current flow or clamp action on the voo supply when power is applied or removed from c04066a. 2. i n certain applications, the external load resistor current may include both voo and signal'line components. to avoid drawing voo current when switch cur rent flows into terminals 1, 4, 8, or 11, the voltage drop across the bidirectional switch. must not exceed 0.8 volt (calcu- tated from ron values shown). no voo current will flow through rl if the switch current flows into terminals 2, 3,9, or 10. 3. minimum bilateral switch output load resistance is 100 n. features: ? 15-v digital or 7.5-v peak-to-peak switching ? 80n typical on resistance for 15-v operation ? switch on resistance matched to within 5 n over 15-v signal-input range ? on resistance flat over full peak-to-peak signal range ? high on/off output-voltage ratio: 65 db typo @ f is = 10 khz, rl = 10 kn ? high degree of linearity: < 0.5% distor- tion typo @ fis = 1 khz, vis = 5 v p _ p , voo-vs~10v'~l=10kn ? extremely low of f switch leakage result- ing in very low offset current and high effective off resistance: 10 pa typo @ voo-vss = 10 v, ta = 25c ? extremely high control input impedance (control circuit isolated from signal circuitl: 10 12 n typo ? low crosstalk between switches: -50 db typo @ fis = 0.9 mhz, rl = 1 kn normal operation control-line biasing switch on.1o\: '1-' voo cd4066a functional diagram ? matched control-input to signal-output capacitance: reduces output signal transients ? frequency response, switch on = 40 mhz (typ.) ? quiescent current specified to 15-v ? maximum control input leakage current of 1-~a at 15-v (full package- temperature range) signal-level rang_ vss s vi. :svoo .. * all control inputs are protected by cos/mos protection network '_m'b;, 92cs-21628r2 vss fig. , - schematic diagram of , of 4 identical switches bnd its buociated control circuitry. maximum ratings, absolute-maximum values: storage temperature range (tstgl .. operating temperature range (tal ........... -65 to +125c package types d. f, k, h. . ........ . ........... -55 to +125c package type e . . . . . . . . . . . . . . . . . . -40 to +85 c dc supply voltage range, v dd (voltages referenced to v ss ) . . . . . . . . . . . . . ................... -0.5 to +15 v input current (transmission gate incl.). . . . . . . . . . . . . . . . . . . 10 ma power dissipation per package. for t a c -40 to +60c (package type e i " . . . . . . . . . ........ '.' for t a = +60 to +85c (package type e) derate linearly at 12 mw/oc ..... . for t a c -55 to +100c (package types 0, f, k) ................... . for t a = +100 to +125c (package types d, f, k) derate linearly at 12 mw/oc .. . device dissipation per section' 500mw 200mw 500mw 200mw for t a =full packagetemperature range (all package types) . 100 mw all signal and digital control inputs. . ........ vss ~ vi ~ v dd lead temperature (during soldering): at distance 1/16 1/32 inch (1.59 0.79 mm) from case for 10 s max. operating conditions at ta = 2soc for maximum reliability, nominal operating conditions should be selected so that operation is always within the following ranges. supply voltage range (t a = full package tempera- ture range) 3 12 +265c v 580 ______________________________________________________________ __
app/ications: ? an:llog signa'i switching/multiplexing signal gatling modulator :~quelch control demodulator ichopper com mutating switch ? digital signal switching/multiplexing ele(:trical characteristics test conditions all vol. values characteristic 4rein volts v dd iv) quies'::ent device c:urrent. i l max. 5 10 o. f. h pkgs. 15 5 e pkg 10 15 i sign,~l ivisl a ... u uu eu,,, 'osl voo vss v's r 10kn i-~: ~o on rnslstance. ron max ~15 -:~o ~10 +2.5 -25 1-~5 0+ 5 rl 10kn +75/ -7.5 1+75 to llon resistance blltween 1+' ,to any 2 of 4 switches, +15 1 0 too ii ~on +5 i -5 +5 i +' i to +10 'i 0 0 :~. sine wave response ri a 10kn loistortlonl f , ; 1khz +5 -5 1-5p.p frequ'lncy respon:;e rl a lkn sw.tch on 2010910 v os a -jdb is,newave inputl v's +5 i -5 1-5p.p feedthroughswitch off rl a lkn 2010910 vos = -5od8 vis voo vc a input or output le'ekage - vss sw.tch off ieffectlve +7.5 -75 i75 off resistancel +5 5 i5 iv. ala v oo =+5 iai ivclblavss= -5 5v crosstalk p.p belween any 2 of the 4 rl = lkn '--- swtches (f at --so db) 12010910 v oslbi a-5odb v .. iai ? transmission-gate logic implemeriltation ? analog-to-ciigital & digital-to-analog con- version ? digital control of frequency, imp!dance, ph:ne, and analog-signal gain limits values at -55c. +25c. +125c apply to o. f. h packages values at -4coc. +25c. +85c apply to e package units +.~o _55 -40" +85 +125 typ. i max 025 - - 75 0.01 025 05 - - 15 001 05 jj.a 2 - - 40 0.02 2 - 25 15 - 0.25 2.5 - 5 30 - 025 5 jj.a 50 500 0.5 50 220 2511 300 320 80 280 n 400 4511 520 550 120 500 3000 3500 5200 5500 270 5000 - - - - 5 - n - - - - 10 - - - - - 04 - 'l!. - - - - 40 - mhz - - - - 125 - :vlhz - - - - io 1 il00' na - :to 1 il00' - - - - 09 - mhz cd4066a typ s signal voltage: iv,,' - volts fig. 2 (s) - typlcsl chsnnel on resi,mnce vi. signal vo/mge for three values of supply volt- age {voo-vssj o signal voltage iv,,' - yolts fig. 2 (b) - typicsl channel on reslsmnce vi. signal vo/mgb mth supply voltage {v 00- vssj -5 v. ."" '00 '55 'u -- ;,l lit - signal vol fage iv,.' - volts fig. 2 (c) - typlcsl channel on resismnce vi. signal vo/mge with supply voltage {v 00- vssj '" 10 v. .'" supply .f ; l~ ~ :i:~ ; :;i~i -8 signal voltage iv u ' - vol t5 fig. 2 (d) - typical chsnnsl on resismnce !>'s. signsl voltage with supply vo/mge (v 00- vssj '" 15 v. 581
cd4066a typ s electrical characteristics (cont'd) characteristic propagation delay (signal i nput to signal output) tpd capacitance' input. c's output. cos feedthrough. c ,os control (v c ) noise immunity. v nl min input leakage current. iii max. test conditions all voltagtt vaillft anrm volts i vdd (v) vc = voo voo vss = gno = 5 c l = 15pf - v's = sq wave voo t r ? tf = 20 ns = 10 (input signal) voo = +5 vcc= vss =-5 v,s"v oo l,s=i~a voo - vss = 10 v,s"v oo voo-vss=t5 v c " voo - vss = 10 limits values at _55c. +25c. ~125c apply to d. f. h packages values at -4o"c. +25c. +85c apply to e package _55 _40 +85 +125 t-ty-p-.-r-m-a-x-.-i it 20 10 05 2mon 4.5 50 50 25 units pf v /la mv cro~:~:~llnput to vc = 10 rl = 10kn signal output (sq wave) f-;~;;:;;;;;o1---i----t----+--l----+---t--~ i-----------i t rc = t fc i rl =300kn propagation delay. tpdc maximum allowable control i nput repetition rate av. input capacitance. c i =20ns v ,s "10 c l = 15pf voo= 10. vss=gno rl = lkn. c l = 15pf vc = 10 (sq. wave) r. tf = 20ns 35 10 mhz pf ? limit determined by minimum feesible leakage measurement for automatic testing. fl symmetrical about 0 volts. ? for all test conditions. c loi r-----h------, : vc"-'v v o".'v : i i i i i i cii~ i "*' measureo on eoonton capacitance bridge model 7'a (imh.' test fixture capacitance nulled out 92es-u918 fig. 6 - capacitance test circuit. all unused inputs are connected to vss ucs-23920ri fig. 8 - propagation delay time signal input (vis) . to lignal output (v oslo 582 all unused terminals are connected to vss 92es-23919 fig. 7 - off switch input or output leakage. "'iov~ 'r'f -20"1 92c5-23921 voo all unused terminals are connected to vss fig. 9 - crosstalk-control input to signal output. 300n all unused terminals are connecteo to vss 92es-23922ri fig. 11 - propagation delay tplh' tphl control- signal output. vdd 10 kn x-v '-- __ .... ____ ~plotter h.p moseley 7030a 92cs 12716 fig. 3 - channel on resistance measurement circuit. input signal voltage (yul- volts iic.-1js117 fig. 4 - typical on characteristics for 1 of 4 channels. 10 : ambient temperature cta)-z'c ? ? -wi i ? ? 10" switching 'reouljfty (fl~'h, .'el-is"4 fig. 5 - power dissipation per package vs. switching frequency. ~ep vc rate _,-',20nl vo'90'll~-1 10"4 -0 20 i i n~~~ +io~ vc 'r,-20n. all unused inputs are connected to vss. 92es- 25923 fig. 1f) - maximum allowable control input repeti- tion rate. fig. 12 - input lellkaf/l1 current telt circuit.


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